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Porting FreeRTOS to Nexys A7 50T FPGA Board

Could I get a comprehensive documentation in layman terms for the steps that I would have to follow to port FreeRTOS on the Nexys A7 50T ?

Comprehensive + easy to understand in layman terms is really hard. One can’t port an OS without a deep understanding of the OS and the target architecture.

The closest thing to a guide is Creating a new a FreeRTOS port.

Also, the board you’ve referenced has an FPGA. That thing can emulate any CPU (within the gate count limits) via a softcore. If you configure it to emulate a RISC-V core, the needed knowledge will be different compared to when you let it emulate a ARM core.

Though in relation to this post where someone uses the board with a RISC-V core, I’d have to ask why you’d need to create a port at all. There exists a FreeRTOS port for RISC-V (https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/main/portable/GCC/RISC-V) with very detailed information on it (FreeRTOS for RISC-V RV32 and RV64), telling you exactly how to set it up (aka, copy the port into your project and setup compiler flags).

In fact you can skip even all of that and just use the pre-existing frameworks where FreeRTOS is already included. PlatformIO has examples for that at https://github.com/platformio/platform-chipsalliance/tree/develop/examples/rtosal-freertos, uses wd-riscv-sdk with activated FreeRTOS component.

One doesn’t need to do this extreme low-level programming from scratch to get FreeRTOS working on a RISC-V core for this board.