Hey everyone,
I m working on a fully open source motor control firmware for the B-G431B-ESC1 eval board. So far I managed to generate a center aligned three phase PWM using timer 1 on the corresponding PWM output pins and configure ADC 1 and 2 in dual mode to read the current sensor pins and DC link voltage as a regular sequence and write the results to memory using DMA. What I am currently stuck at is triggering the ADC using the timer using output compare channel 4.
This is how I think it should work after reading the reference manual:
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configure ADCs as usual
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configure an external ADC trigger using the EXTEN and EXTSEL bits in the ADC_CFGR register
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set the ADSTART bit in the ADC_CR register
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configure the timer as usual
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configure the timer’s MMS register to output the needed TRGO signal
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enable the timer
In my case, the ADC does exactly one conversion of all configured channels and DMA writes the results to memory. after that, no new measurements are written to the memory.
To make sure the reason is not the DMA, I tried triggering the ADC in software multiple times after disabling the external trigger. That works (new ADC samples in memory after every start of conversion), so I think DMA is working fine.
Next I was unsure whether the trigger signal actually does anything or if the ADC just starts a conversion right when I set the ADSTART bit. To check that, I left everything as is but did not start the timer. Now the ADC did not convert anything (or at least I don’t see any data being written to memory). This tells me that the one conversion sequence the ADC did before was probably actually triggered by the timer and the trigger signal works fine as well.
Looking into the peripheral registers I found the reason that no new conversions happen is most likely that after the first conversion, the ADSTART is no longer set. The reference manual states that the hardware trigger only works when ADSTART is set. What I don’t understand is why ADSTART gets reset. According to the reference manual p. 619, ADSTART should remain set after a conversion when EXTSEL is not zero (which is the case here):
When a hardware trigger is selected in single mode (CONT = 0 and EXTSEL≠0x00),
ADSTART is not cleared by hardware with the assertion of EOS to help the software which
does not need to reset ADSTART again for the next hardware trigger event. This ensures
that no further hardware triggers are missed.
If you think it would help I can post my code here.
The silicon errata sheet does not name this issue. Any idea what could be wrong here?
Thanks for your help