Custom riscv core debugging

Can I integrate my developed RISC-V core into PlatformIO? Is it possible to compile C code or RISC-V assembly code into machine code and then execute it on this core using PlatformIO? During this process, can I inspect register values, memory, and the program counter? If so, what steps should I follow in PlatformIO.

How is this different to what’s asked in Not board, devkit or etc. just want to add riscv core to pio and i want to observe the registers? Please follow the recommendations and discussion there.