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Command 'flash write_image' failed with error code -1401

Hey, can anyone help me with that error?
PS: Error is at the bottom

Executing task in folder 200629-213850-arduino-blink: C:\Users\LucaMoser\.platformio\penv\Scripts\platformio.exe run --target upload <

Processing esp32dev (platform: espressif32; framework: arduino; board: esp32dev)

Verbose mode can be enabled via `-v, --verbose` option
CONFIGURATION: 
PLATFORM: Espressif 32 1.12.4 > Espressif ESP32 Dev Module
HARDWARE: ESP32 240MHz, 320KB RAM, 4MB Flash
DEBUG: Current (esp-prog) External (esp-prog, iot-bus-jtag, jlink, minimodule, olimex-arm-usb-ocd, olimex-arm-usb-ocd-h, olimex-arm-usb-tiny-h, olimex-jtag-tiny, tumpa)
PACKAGES:
 - framework-arduinoespressif32 3.10004.200129 (1.0.4)
 - tool-esptoolpy 1.20600.0 (2.6.0)
 - tool-mkspiffs 2.230.0 (2.30)
 - tool-openocd-esp32 1.1000.20190708 (10.0) 
 - toolchain-xtensa32 2.50200.80 (5.2.0)
LDF: Library Dependency Finder -> http://bit.ly/configure-pio-ldf
LDF Modes: Finder ~ chain, Compatibility ~ soft
Found 26 compatible libraries
Scanning dependencies...
No dependencies
Building in debug mode
Retrieving maximum program size .pio\build\esp32dev\firmware.elf
Checking size .pio\build\esp32dev\firmware.elf
Advanced Memory Usage is available via "PlatformIO Home > Project Inspect"
RAM:   [          ]   4.7% (used 15348 bytes from 327680 bytes)
Flash: [==        ]  16.1% (used 211033 bytes from 1310720 bytes)
Configuring upload protocol...
AVAILABLE: esp-prog, espota, esptool, iot-bus-jtag, jlink, minimodule, olimex-arm-usb-ocd, olimex-arm-usb-ocd-h, olimex-arm-usb-tiny-h, olimex-jtag-tiny, tumpa
CURRENT: upload_protocol = esp-prog
Uploading .pio\build\esp32dev\firmware.bin
Open On-Chip Debugger  v0.10.0-esp32-20200526 (2020-05-26-09:28)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
debug_level: 1

adapter speed: 20000 kHz

Warn : Transport "jtag" was already selected
User : 44 5 options.c:60 configuration_output_handler(): debug_level: 3
User : 45 5 options.c:60 configuration_output_handler():
Debug: 46 5 command.c:143 script_debug(): command - init init
Debug: 48 6 command.c:143 script_debug(): command - target target init
Debug: 50 6 command.c:143 script_debug(): command - target target names
Debug: 51 6 command.c:143 script_debug(): command - esp32 esp32 cget -event gdb-flash-erase-start
Debug: 52 6 command.c:143 script_debug(): command - esp32 esp32 configure -event gdb-flash-erase-start reset init
Debug: 53 7 command.c:143 script_debug(): command - esp32 esp32 cget -event gdb-flash-write-end
Debug: 54 7 command.c:143 script_debug(): command - esp32 esp32 configure -event gdb-flash-write-end reset halt
Debug: 55 7 command.c:143 script_debug(): command - esp32 esp32 cget -event gdb-attach
Debug: 56 7 target.c:1474 handle_target_init_command(): Initializing targets...
Debug: 57 7 xtensa_mcore.c:320 xtensa_mcore_target_init(): xtensa_mcore_target_init
Debug: 58 7 semihosting_common.c:98 semihosting_common_init():
Debug: 59 8 semihosting_common.c:98 semihosting_common_init():
Debug: 60 8 semihosting_common.c:98 semihosting_common_init():
Debug: 61 8 semihosting_common.c:98 semihosting_common_init():
Debug: 62 8 command.c:355 register_command_handler(): registering 'target_request'...
Debug: 63 8 command.c:355 register_command_handler(): registering 'trace'...
Debug: 64 8 command.c:355 register_command_handler(): registering 'trace'...
Debug: 65 8 command.c:355 register_command_handler(): registering 'fast_load_image'...
Debug: 66 9 command.c:355 register_command_handler(): registering 'fast_load'...
Debug: 67 9 command.c:355 register_command_handler(): registering 'profile'...
Debug: 68 9 command.c:355 register_command_handler(): registering 'virt2phys'...
Debug: 69 9 command.c:355 register_command_handler(): registering 'reg'...
Debug: 70 9 command.c:355 register_command_handler(): registering 'poll'...
Debug: 71 9 command.c:355 register_command_handler(): registering 'wait_halt'...
Debug: 72 9 command.c:355 register_command_handler(): registering 'halt'...
Debug: 73 9 command.c:355 register_command_handler(): registering 'resume'...
Debug: 74 9 command.c:355 register_command_handler(): registering 'reset'...
Debug: 75 10 command.c:355 register_command_handler(): registering 'soft_reset_halt'...
Debug: 76 10 command.c:355 register_command_handler(): registering 'step'...
Debug: 77 10 command.c:355 register_command_handler(): registering 'mdd'...
Debug: 78 10 command.c:355 register_command_handler(): registering 'mdw'...
Debug: 79 10 command.c:355 register_command_handler(): registering 'mdh'...
Debug: 80 10 command.c:355 register_command_handler(): registering 'mdb'...
Debug: 81 10 command.c:355 register_command_handler(): registering 'mwd'...
Debug: 82 10 command.c:355 register_command_handler(): registering 'mww'...
Debug: 83 10 command.c:355 register_command_handler(): registering 'mwh'...
Debug: 84 10 command.c:355 register_command_handler(): registering 'mwb'...
Debug: 85 11 command.c:355 register_command_handler(): registering 'bp'...
Debug: 86 11 command.c:355 register_command_handler(): registering 'rbp'...
Debug: 87 11 command.c:355 register_command_handler(): registering 'wp'...
Debug: 88 11 command.c:355 register_command_handler(): registering 'rwp'...
Debug: 89 11 command.c:355 register_command_handler(): registering 'load_image'...
Debug: 90 11 command.c:355 register_command_handler(): registering 'dump_image'...
Debug: 91 11 command.c:355 register_command_handler(): registering 'verify_image_checksum'...
Debug: 92 11 command.c:355 register_command_handler(): registering 'verify_image'...
Debug: 93 12 command.c:355 register_command_handler(): registering 'test_image'...
Debug: 94 12 command.c:355 register_command_handler(): registering 'reset_nag'...
Debug: 95 12 command.c:355 register_command_handler(): registering 'ps'...
Debug: 96 12 command.c:355 register_command_handler(): registering 'test_mem_access'...
Debug: 97 12 command.c:355 register_command_handler(): registering 'set_core'...
Debug: 98 12 ftdi.c:657 ftdi_initialize(): ftdi interface using shortest path jtag state transitions
Error: 99 30 mpsse.c:190 open_matching_device(): libusb_open() failed with LIBUSB_ERROR_NOT_SUPPORTED
Error: 100 30 mpsse.c:190 open_matching_device(): libusb_open() failed with LIBUSB_ERROR_NOT_SUPPORTED
Debug: 101 30 mpsse.c:425 mpsse_purge(): -
Debug: 102 32 mpsse.c:706 mpsse_loopback_config(): off
Debug: 103 33 mpsse.c:751 mpsse_set_frequency(): target 5000000 Hz
Debug: 104 33 mpsse.c:743 mpsse_rtck_config(): off
Debug: 105 33 mpsse.c:732 mpsse_divide_by_5_config(): off
Debug: 106 33 mpsse.c:712 mpsse_set_divisor(): 5
Debug: 107 33 mpsse.c:775 mpsse_set_frequency(): actually 5000000 Hz
Debug: 108 33 core.c:1668 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 109 33 core.c:1672 adapter_khz_to_speed(): have interface set up
Debug: 110 34 mpsse.c:751 mpsse_set_frequency(): target 5000000 Hz
Debug: 111 34 mpsse.c:743 mpsse_rtck_config(): off
Debug: 112 34 mpsse.c:732 mpsse_divide_by_5_config(): off
Debug: 113 34 mpsse.c:712 mpsse_set_divisor(): 5
Debug: 114 34 mpsse.c:775 mpsse_set_frequency(): actually 5000000 Hz
Debug: 115 34 core.c:1668 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 116 34 core.c:1672 adapter_khz_to_speed(): have interface set up
Info : 117 34 core.c:1450 adapter_init(): clock speed 5000 kHz
Debug: 118 34 openocd.c:141 handle_init_command(): Debug Adapter init complete
Debug: 119 34 command.c:143 script_debug(): command - transport transport init
Debug: 121 35 transport.c:239 handle_transport_init(): handle_transport_init
Debug: 122 35 core.c:729 jtag_add_reset(): SRST line released
Debug: 123 35 core.c:753 jtag_add_reset(): TRST line released
Debug: 124 35 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 125 36 command.c:143 script_debug(): command - jtag jtag arp_init
Debug: 126 36 core.c:1463 jtag_init_inner(): Init JTAG chain
Debug: 127 36 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 128 36 core.c:1128 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 129 36 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 130 37 core.c:1027 jtag_examine_chain_display(): JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : 131 37 core.c:1027 jtag_examine_chain_display(): JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Debug: 132 38 core.c:1259 jtag_validate_ircapture(): IR capture validation scan
Debug: 133 38 core.c:1317 jtag_validate_ircapture(): esp32.cpu0: IR capture 0x01
Debug: 134 38 core.c:1317 jtag_validate_ircapture(): esp32.cpu1: IR capture 0x01
Debug: 135 38 command.c:143 script_debug(): command - dap dap init
Debug: 137 39 arm_dap.c:106 dap_init_all(): Initializing all DAPs ...
Debug: 138 39 openocd.c:158 handle_init_command(): Examining targets...
Debug: 139 39 target.c:1662 target_call_event_callbacks(): target event 17 (examine-start) for core esp32
Debug: 140 39 esp32.c:569 esp32_handle_target_event(): 17
Debug: 141 39 target.c:1662 target_call_event_callbacks(): target event 17 (examine-start) for core cpu0
Debug: 142 40 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 17
Debug: 143 40 target.c:1662 target_call_event_callbacks(): target event 17 (examine-start) for core cpu1
Debug: 144 40 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 17
Debug: 145 40 xtensa.c:548 xtensa_examine(): xtensa_examine coreid=0
Debug: 146 41 xtensa.c:561 xtensa_examine(): OCD_ID = 0733bff2
Debug: 147 41 xtensa.c:548 xtensa_examine(): xtensa_examine coreid=1
Debug: 148 42 xtensa.c:558 xtensa_examine(): OCD_ID = 00000000
Debug: 149 42 target.c:1662 target_call_event_callbacks(): target event 18 (examine-end) for core esp32
Debug: 150 42 esp32.c:569 esp32_handle_target_event(): 18
Debug: 151 42 target.c:1662 target_call_event_callbacks(): target event 18 (examine-end) for core cpu0
Debug: 152 42 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 18
Debug: 153 42 target.c:1662 target_call_event_callbacks(): target event 18 (examine-end) for core cpu1
Debug: 154 104 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 18
Debug: 155 104 command.c:143 script_debug(): command - flash flash init
Debug: 156 105 xtensa_mcore.c:442 xtensa_mcore_poll(): xtensa_mcore_poll: core_poweron_mask=1
Info : 157 106 xtensa_mcore.c:451 xtensa_mcore_poll(): esp32: Debug controller 0 was reset.
Info : 158 106 xtensa_mcore.c:455 xtensa_mcore_poll(): esp32: Core 0 was reset.
Debug: 159 106 esp_xtensa.c:230 esp_xtensa_on_reset(): start
Debug: 160 107 xtensa_mcore.c:470 xtensa_mcore_poll(): xtensa_mcore_poll: Core 0 came online, setting up DCR
Debug: 161 107 xtensa.c:595 xtensa_smpbreak_set(): xtensa_smpbreak_set set smpbreak=30000, state=1
Debug: 163 109 tcl.c:1222 handle_flash_init_command(): Initializing flash devices...
Debug: 164 109 command.c:355 register_command_handler(): registering 'flash'...
Debug: 165 109 command.c:355 register_command_handler(): registering 'flash'...
Debug: 166 109 command.c:355 register_command_handler(): registering 'flash'...
Debug: 167 109 command.c:355 register_command_handler(): registering 'flash'...
Debug: 168 110 command.c:355 register_command_handler(): registering 'flash'...
Debug: 169 110 command.c:355 register_command_handler(): registering 'flash'...
Debug: 170 110 command.c:355 register_command_handler(): registering 'flash'...
Debug: 171 110 command.c:355 register_command_handler(): registering 'flash'...
Debug: 172 110 command.c:355 register_command_handler(): registering 'flash'...
Debug: 173 110 command.c:355 register_command_handler(): registering 'flash'...
Debug: 174 110 command.c:355 register_command_handler(): registering 'flash'...
Debug: 175 110 command.c:355 register_command_handler(): registering 'flash'...
Debug: 176 110 command.c:355 register_command_handler(): registering 'flash'...
Debug: 177 111 command.c:355 register_command_handler(): registering 'flash'...
Debug: 178 111 command.c:143 script_debug(): command - nand nand init
Debug: 179 111 xtensa_mcore.c:442 xtensa_mcore_poll(): xtensa_mcore_poll: core_poweron_mask=1
Info : 180 112 xtensa_mcore.c:451 xtensa_mcore_poll(): esp32: Debug controller 0 was reset.
Info : 181 112 xtensa_mcore.c:455 xtensa_mcore_poll(): esp32: Core 0 was reset.
Debug: 182 112 esp_xtensa.c:230 esp_xtensa_on_reset(): start
Debug: 183 113 xtensa_mcore.c:470 xtensa_mcore_poll(): xtensa_mcore_poll: Core 0 came online, setting up DCR
Debug: 184 113 xtensa.c:595 xtensa_smpbreak_set(): xtensa_smpbreak_set set smpbreak=30000, state=1
Debug: 186 114 tcl.c:498 handle_nand_init_command(): Initializing NAND devices...
Debug: 187 114 command.c:143 script_debug(): command - pld pld init
Debug: 188 115 xtensa_mcore.c:442 xtensa_mcore_poll(): xtensa_mcore_poll: core_poweron_mask=1
Debug: 189 115 xtensa_mcore.c:470 xtensa_mcore_poll(): xtensa_mcore_poll: Core 0 came online, setting up DCR
Debug: 190 116 xtensa.c:595 xtensa_smpbreak_set(): xtensa_smpbreak_set set smpbreak=30000, state=1
Debug: 192 117 pld.c:206 handle_pld_init_command(): Initializing PLDs...
Debug: 193 117 gdb_server.c:3491 gdb_target_start(): starting gdb server for esp32 on 3333
Info : 194 118 server.c:311 add_service(): Listening on port 3333 for gdb connections
Debug: 195 118 command.c:143 script_debug(): command - reset reset init
Debug: 197 121 target.c:1680 target_call_reset_callbacks(): target reset 3 (init)
Debug: 198 121 command.c:143 script_debug(): command - target target names
Debug: 199 122 command.c:143 script_debug(): command - esp32 esp32 invoke-event reset-start
Debug: 200 122 command.c:143 script_debug(): command - transport transport select
Debug: 201 122 command.c:143 script_debug(): command - jtag jtag arp_init-reset
Debug: 202 122 core.c:1577 jtag_init_reset(): Initializing with hard TRST+SRST reset
Debug: 203 122 core.c:742 jtag_add_reset(): JTAG reset with TLR instead of TRST
Debug: 204 122 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 205 123 core.c:1463 jtag_init_inner(): Init JTAG chain
Debug: 206 123 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 207 203 core.c:1128 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 208 203 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Info : 209 204 core.c:1027 jtag_examine_chain_display(): JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : 210 204 core.c:1027 jtag_examine_chain_display(): JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Debug: 211 204 core.c:1259 jtag_validate_ircapture(): IR capture validation scan
Debug: 212 205 core.c:1317 jtag_validate_ircapture(): esp32.cpu0: IR capture 0x01
Debug: 213 205 core.c:1317 jtag_validate_ircapture(): esp32.cpu1: IR capture 0x01
Debug: 214 205 command.c:143 script_debug(): command - transport transport select
Debug: 215 205 command.c:143 script_debug(): command - esp32 esp32 cget -chain-position
Debug: 216 206 command.c:143 script_debug(): command - jtag jtag tapisenabled esp32.cpu0
Debug: 217 206 command.c:143 script_debug(): command - esp32 esp32 invoke-event examine-start
Debug: 218 206 command.c:143 script_debug(): command - esp32 esp32 arp_examine allow-defer
Debug: 219 206 xtensa.c:548 xtensa_examine(): xtensa_examine coreid=0
Debug: 220 207 xtensa.c:561 xtensa_examine(): OCD_ID = 0733bff2
Debug: 221 207 xtensa.c:548 xtensa_examine(): xtensa_examine coreid=1
Debug: 222 208 xtensa.c:558 xtensa_examine(): OCD_ID = 00000000
Debug: 223 208 command.c:143 script_debug(): command - esp32 esp32 invoke-event examine-end
Debug: 224 208 command.c:143 script_debug(): command - esp32 esp32 invoke-event reset-assert-pre
Debug: 225 208 command.c:143 script_debug(): command - transport transport select
Debug: 226 208 command.c:143 script_debug(): command - esp32 esp32 cget -chain-position
Debug: 227 208 command.c:143 script_debug(): command - jtag jtag tapisenabled esp32.cpu0
Debug: 228 208 command.c:143 script_debug(): command - esp32 esp32 arp_reset assert 1
Debug: 229 208 target.c:2036 target_free_all_working_areas_restore(): freeing all working areas
Debug: 230 209 target.c:2036 target_free_all_working_areas_restore(): freeing all working areas
Debug: 231 209 esp32.c:232 esp32_assert_reset(): esp32: begin
Debug: 232 209 esp32.c:263 esp32_soc_reset(): start
Debug: 233 209 esp32.c:267 esp32_soc_reset(): esp32_soc_reset: Target not halted before SoC reset, trying to halt it first
Debug: 234 209 xtensa.c:899 xtensa_halt(): xtensa_halt, target: cpu0
Info : 235 210 xtensa.c:1544 xtensa_poll(): cpu0: Debug controller 0 was reset.
Info : 236 210 xtensa.c:1546 xtensa_poll(): cpu0: Core 0 was reset.
Debug: 237 214 xtensa.c:720 xtensa_fetch_all_regs(): cpu0: start
Debug: 238 219 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (80208411)
Debug: 239 227 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (80208411)
Debug: 240 227 xtensa.c:1588 xtensa_poll(): cpu0: Target halted, pc=0x400074DD, debug_reason=00000000, oldstate=00000001
Debug: 241 227 xtensa.c:1593 xtensa_poll(): cpu0: Halt reason=0x00000020, exc_cause=0, dsr=0x80208411
Info : 242 227 xtensa.c:1596 xtensa_poll(): cpu0: Target halted, PC=0x400074DD, debug_reason=00000000
Debug: 243 228 target.c:1662 target_call_event_callbacks(): target event 0 (gdb-halt) for core cpu0
Debug: 244 228 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 0
Debug: 245 228 target.c:1662 target_call_event_callbacks(): target event 1 (halted) for core cpu0
Debug: 246 228 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 1
Debug: 247 228 esp32.c:351 esp32_soc_reset(): loading stub code into RTC RAM
Debug: 248 228 target.c:2336 target_read_buffer(): reading buffer of 212 byte at 0x50000000
Debug: 249 231 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 250 231 target.c:2274 target_write_buffer(): writing buffer of 212 byte at 0x50000000
Debug: 251 234 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 252 234 esp32.c:376 esp32_soc_reset(): resuming the target
Debug: 253 234 xtensa.c:1015 xtensa_resume(): cpu0:
Debug: 254 321 xtensa.c:944 xtensa_prepare_resume(): cpu0: current=0 address=0x50000004, handle_breakpoints=0, debug_execution=0)
Debug: 255 321 xtensa.c:413 xtensa_write_dirty_registers(): cpu0: start
Debug: 256 321 xtensa.c:427 xtensa_write_dirty_registers(): cpu0: Writing back reg pc val 50000004
Debug: 257 322 xtensa.c:488 xtensa_write_dirty_registers(): cpu0: Writing back reg a3 value 3F401440, num =4
Debug: 258 323 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 259 323 xtensa.c:997 xtensa_do_resume(): cpu0: start
Debug: 260 324 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (80000000)
Debug: 261 324 target.c:1662 target_call_event_callbacks(): target event 2 (resumed) for core cpu0
Debug: 262 324 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 2
Debug: 263 324 esp32.c:385 esp32_soc_reset(): resume done, waiting for the target to come alive
Debug: 264 431 esp32.c:403 esp32_soc_reset(): halting the target
Debug: 265 431 xtensa.c:899 xtensa_halt(): xtensa_halt, target: cpu0
Info : 266 432 xtensa.c:1544 xtensa_poll(): cpu0: Debug controller 0 was reset.
Info : 267 432 xtensa.c:1546 xtensa_poll(): cpu0: Core 0 was reset.
Debug: 268 433 xtensa.c:720 xtensa_fetch_all_regs(): cpu0: start
Debug: 269 438 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (80208411)
Debug: 270 446 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (80208411)
Debug: 271 446 xtensa.c:1588 xtensa_poll(): cpu0: Target halted, pc=0x500000CF, debug_reason=00000000, oldstate=00000001
Debug: 272 446 xtensa.c:1593 xtensa_poll(): cpu0: Halt reason=0x00000020, exc_cause=0, dsr=0x80208411
Info : 273 446 xtensa.c:1596 xtensa_poll(): cpu0: Target halted, PC=0x500000CF, debug_reason=00000000
Debug: 274 446 target.c:1662 target_call_event_callbacks(): target event 0 (gdb-halt) for core cpu0
Debug: 275 446 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 0
Debug: 276 446 target.c:1662 target_call_event_callbacks(): target event 1 (halted) for core cpu0
Debug: 277 446 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 1
Debug: 278 447 esp32.c:412 esp32_soc_reset(): restoring RTC_SLOW_MEM
Debug: 279 447 target.c:2274 target_write_buffer(): writing buffer of 212 byte at 0x50000000
Debug: 280 449 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 281 449 FreeRTOS.c:688 FreeRTOS_post_reset_cleanup(): FreeRTOS_post_reset_cleanup
Debug: 282 449 xtensa_mcore.c:34 xtensa_mcore_assert_reset(): esp32: begin
Debug: 283 449 xtensa.c:675 xtensa_assert_reset(): xtensa_assert_reset[cpu0] coreid=0, target_number=0, begin
Debug: 284 451 xtensa.c:675 xtensa_assert_reset(): xtensa_assert_reset[cpu1] coreid=1, target_number=0, begin
Debug: 285 451 command.c:143 script_debug(): command - esp32 esp32 invoke-event reset-assert-post
Debug: 286 451 command.c:143 script_debug(): command - esp32 esp32 invoke-event reset-deassert-pre
Debug: 287 451 command.c:143 script_debug(): command - transport transport select
Debug: 288 451 command.c:143 script_debug(): command - esp32 esp32 cget -chain-position
Debug: 289 452 command.c:143 script_debug(): command - jtag jtag tapisenabled esp32.cpu0
Debug: 290 452 command.c:143 script_debug(): command - esp32 esp32 arp_reset deassert 1
Debug: 291 452 target.c:2036 target_free_all_working_areas_restore(): freeing all working areas
Debug: 292 452 target.c:2036 target_free_all_working_areas_restore(): freeing all working areas
Debug: 293 452 xtensa.c:595 xtensa_smpbreak_set(): xtensa_smpbreak_set set smpbreak=30000, state=3
Debug: 294 453 xtensa.c:595 xtensa_smpbreak_set(): xtensa_smpbreak_set set smpbreak=30000, state=3
Debug: 295 453 xtensa.c:694 xtensa_deassert_reset(): xtensa_deassert_reset coreid=0 halt=1
Debug: 296 453 xtensa.c:694 xtensa_deassert_reset(): xtensa_deassert_reset coreid=1 halt=1
Debug: 297 454 command.c:143 script_debug(): command - esp32 esp32 invoke-event reset-deassert-post
Debug: 298 454 command.c:143 script_debug(): command - transport transport select
Debug: 299 454 command.c:143 script_debug(): command - esp32 esp32 cget -chain-position
Debug: 300 458 command.c:143 script_debug(): command - jtag jtag tapisenabled esp32.cpu0
Debug: 301 459 command.c:143 script_debug(): command - esp32 esp32 was_examined
Debug: 302 459 command.c:143 script_debug(): command - esp32 esp32 arp_waitstate halted 1000
Debug: 303 460 xtensa_mcore.c:442 xtensa_mcore_poll(): xtensa_mcore_poll: core_poweron_mask=3
Info : 304 460 xtensa_mcore.c:455 xtensa_mcore_poll(): esp32: Core 0 was reset.
Debug: 305 460 esp_xtensa.c:230 esp_xtensa_on_reset(): start
Info : 306 461 xtensa_mcore.c:451 xtensa_mcore_poll(): esp32: Debug controller 1 was reset.
Info : 307 461 xtensa_mcore.c:455 xtensa_mcore_poll(): esp32: Core 1 was reset.
Debug: 308 461 esp_xtensa.c:230 esp_xtensa_on_reset(): start
Debug: 309 462 xtensa_mcore.c:470 xtensa_mcore_poll(): xtensa_mcore_poll: Core 1 came online, setting up DCR
Debug: 310 462 xtensa.c:595 xtensa_smpbreak_set(): xtensa_smpbreak_set set smpbreak=30000, state=1
Debug: 311 463 xtensa.c:720 xtensa_fetch_all_regs(): cpu0: start
Debug: 312 467 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8031CC11)
Debug: 313 475 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8031CC11)
Debug: 314 475 xtensa.c:720 xtensa_fetch_all_regs(): cpu1: start
Debug: 315 480 xtensa.c:618 xtensa_core_status_check(): cpu1: DSR (80A08411)
Debug: 316 489 xtensa.c:618 xtensa_core_status_check(): cpu1: DSR (80A08411)
Debug: 317 489 xtensa_mcore.c:614 xtensa_mcore_poll(): esp32.cpu0: Target halted, pc=0x40000400, debug_reason=00000000, target_state_old=00000001, active=true
Debug: 318 490 xtensa_mcore.c:620 xtensa_mcore_poll(): esp32.cpu0: Halt reason=0x00000020, exc_cause=0, dsr=0x8031cc11
Info : 319 490 xtensa_mcore.c:624 xtensa_mcore_poll(): Target halted. CPU0: PC=0x40000400 (active)
Debug: 320 491 xtensa_mcore.c:614 xtensa_mcore_poll(): esp32.cpu1: Target halted, pc=0x40000400, debug_reason=00000000, target_state_old=00000001, active=false
Debug: 321 491 xtensa_mcore.c:620 xtensa_mcore_poll(): esp32.cpu1: Halt reason=0x00000020, exc_cause=0, dsr=0x80a08411
Info : 322 491 xtensa_mcore.c:624 xtensa_mcore_poll(): Target halted. CPU1: PC=0x40000400
Debug: 323 492 target.c:2571 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1
Debug: 324 493 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 325 493 target.c:2571 target_write_u32(): address: 0x3ff5f048, value: 0x00000000
Debug: 326 493 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 327 494 target.c:2571 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1
Debug: 328 494 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 329 494 target.c:2571 target_write_u32(): address: 0x3ff60048, value: 0x00000000
Debug: 330 495 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 331 495 target.c:2571 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1
Debug: 332 495 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 333 496 target.c:2571 target_write_u32(): address: 0x3ff4808c, value: 0x00000000
Debug: 334 496 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 335 496 target.c:1662 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32
Debug: 336 496 esp32.c:569 esp32_handle_target_event(): 0
Debug: 337 496 target.c:1662 target_call_event_callbacks(): target event 0 (gdb-halt) for core cpu0
Debug: 338 497 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 0
Debug: 339 497 target.c:1662 target_call_event_callbacks(): target event 0 (gdb-halt) for core cpu1
Debug: 340 497 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 0
Debug: 341 497 target.c:1662 target_call_event_callbacks(): target event 1 (halted) for core esp32
Debug: 342 497 esp32.c:569 esp32_handle_target_event(): 1
Debug: 343 497 esp32.c:474 esp32_is_app_cpu_enabled(): Read cores number
Debug: 344 498 xtensa.c:618 xtensa_core_status_check(): cpu0: DSR (8000CC11)
Debug: 345 498 esp32.c:482 esp32_is_app_cpu_enabled(): Read APP CPU ctrl reg 0x1
Debug: 346 498 esp32.c:484 esp32_is_app_cpu_enabled(): APP CPU enabled
Debug: 347 590 esp32.c:577 esp32_handle_target_event(): Detected 2 cores
Debug: 348 590 target.c:1662 target_call_event_callbacks(): target event 0 (gdb-halt) for core cpu0
Debug: 349 590 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 0
Debug: 350 590 target.c:1662 target_call_event_callbacks(): target event 1 (halted) for core cpu0
Debug: 351 590 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 1
Debug: 352 590 target.c:1662 target_call_event_callbacks(): target event 0 (gdb-halt) for core cpu1
Debug: 353 591 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 0
Debug: 354 591 target.c:1662 target_call_event_callbacks(): target event 1 (halted) for core cpu1
Debug: 355 591 esp_xtensa.c:111 esp_xtensa_handle_target_event(): 1
Debug: 357 592 command.c:143 script_debug(): command - esp32 esp32 curstate
Debug: 358 592 command.c:143 script_debug(): command - transport transport select
Debug: 359 592 command.c:143 script_debug(): command - esp32 esp32 cget -chain-position
Debug: 360 592 command.c:143 script_debug(): command - jtag jtag tapisenabled esp32.cpu0
Debug: 361 592 command.c:143 script_debug(): command - esp32 esp32 was_examined
Debug: 362 593 command.c:143 script_debug(): command - esp32 esp32 arp_waitstate halted 5000
Debug: 363 593 xtensa_mcore.c:442 xtensa_mcore_poll(): xtensa_mcore_poll: core_poweron_mask=3
Debug: 364 596 xtensa_mcore.c:470 xtensa_mcore_poll(): xtensa_mcore_poll: Core 1 came online, setting up DCR
Debug: 365 596 xtensa.c:595 xtensa_smpbreak_set(): xtensa_smpbreak_set set smpbreak=30000, state=2
Debug: 366 597 command.c:143 script_debug(): command - esp32 esp32 invoke-event reset-init
Debug: 367 597 command.c:143 script_debug(): command - esp32 esp32 invoke-event reset-end
Debug: 368 599 command.c:143 script_debug(): command - echo echo ** Programming Started **
er : 370 601 command.c:770 jim_echo(): ** Programming Started 
Debug: 371 601 command.c:143 script_debug(): command - flash flash write_image erase .pio\build\esp32dev\firmware.bin 0x10000 verify
**Debug: 373 604 command.c:630 run_command(): Command 'flash write_image' failed with error code -1401**
**er : 374 604 command.c:695 command_run_line(): embedded:startup.tcl:449: Error: ** Programming Failed** 
in procedure 'program_esp32' 
in procedure 'program_esp' called at file "C:/Users/LucaMoser/.platformio/packages/tool-openocd-esp32/share/openocd/scripts/target/esp32.cfg", line 64
in procedure 'program_error' called at file "CxxUsers/LucaMoser/.platformio/packages/tool-openocd-esp32/share/openocd/scripts/target/esp_common.cfg", line 106
at file "embedded:startup.tcl", line 449
Debug: 375 605 esp_xtensa.c:213 esp_xtensa_target_deinit(): start
Debug: 376 605 xtensa.c:2157 xtensa_deinit(): start
Debug: 377 605 esp_xtensa.c:213 esp_xtensa_target_deinit(): start
Debug: 378 605 xtensa.c:2157 xtensa_deinit(): start
Debug: 379 606 target.c:2036 target_free_all_working_areas_restore(): freeing all working areas
Warn : 380 606 core.c:196 flash_free_all_banks(): Flash driver of esp32.flash does not support free_driver_priv()
Warn : 381 607 core.c:196 flash_free_all_banks(): Flash driver of esp32.irom does not support free_driver_priv()
Warn : 382 607 core.c:196 flash_free_all_banks(): Flash driver of esp32.drom does not support free_driver_priv()
*** [upload] Error 1
================================================================================================== [FAILED] Took 3.06 seconds ================================================================================================== 
The terminal process terminated with exit code: 1

You’ve cross-posted to https://stackoverflow.com/questions/63214771/platformio-error-1401-flashing-esp32-with-espprog-gives-me-an-error but the best place would be https://github.com/espressif/openocd-esp32/issues in my opinion – that openocd errors seems very unique to me and I haven’t seen it elsewhere; original devs might know more.

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