Dual Bank STM32L082

> Executing task in folder DualBank: C:\Users\Jeroen\.platformio\penv\Scripts\platformio.exe run --verbose --target upload --environment STM32L082_bank2 <

Processing STM32L082_bank2 (board_upload.offset_address: 0x08018000; extra_scripts: set_bank2.py; platform: ststm32; board: JENG_STM32L082KZ; framework: arduino; monitor_speed: 115200)
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
CONFIGURATION: https://docs.platformio.org/page/boards/ststm32/JENG_STM32L082KZ.html
PLATFORM: ST STM32 (15.2.0) > JENG_STM32L082KZ
HARDWARE: STM32L082KZ 32MHz, 20KB RAM, 192KB Flash
DEBUG: Current (stlink) On-board (stlink)
PACKAGES:
 - framework-arduinoststm32 4.20100.211028 (2.1.0)
 - framework-cmsis 2.50700.210515 (5.7.0)
 - tool-dfuutil 1.9.200310
 - tool-openocd 2.1100.211028 (11.0)
 - tool-stm32duino 1.0.2
 - toolchain-gccarmnoneeabi 1.90201.191206 (9.2.1)
LDF: Library Dependency Finder -> https://bit.ly/configure-pio-ldf
LDF Modes: Finder ~ chain, Compatibility ~ soft
Found 11 compatible libraries
Scanning dependencies...
No dependencies
Building in release mode
MethodWrapper(["checkprogsize"], [".pio\build\STM32L082_bank2\firmware.elf"])
Advanced Memory Usage is available via "PlatformIO Home > Project Inspect"
RAM:   [          ]   4.1% (used 844 bytes from 20480 bytes)
Flash: [=         ]   6.7% (used 13140 bytes from 196608 bytes)
.pio\build\STM32L082_bank2\firmware.elf  :

section              size        addr
.isr_vector           192   134316032
.text               11900   134316224
.rodata              1128   134328124
.ARM.extab              0   134329252
.ARM                    8   134329252
.preinit_array          0   134329260
.init_array            16   134329260
.fini_array             8   134329276
.data                 112   536870912
.bss                  732   536871024
.noinit                 0   536871756
._user_heap_stack    1540   536871756
.ARM.attributes        40           0
.comment              102           0
.debug_frame         1032           0

Total               16810
<lambda>(["upload"], [".pio\build\STM32L082_bank2\firmware.bin"])
AVAILABLE: mbed, stlink
CURRENT: upload_protocol = mbed
MethodWrapper(["upload"], [".pio\build\STM32L082_bank2\firmware.bin"])
Auto-detected: E:\
MethodWrapper(["upload"], [".pio\build\STM32L082_bank2\firmware.bin"])
Firmware has been successfully uploaded.
(Some boards may require manual hard reset)

That’s not good, when it uses mbed, it has no control over the firmware binary’s target address. It just accepts the plain file with no offset info. You need to make stlink the default upload method. (I hope one is fitted?)

Set upload_protocol = stlink in the [env] section of the platformio.ini, or, exchange

for "protocol": "stlink" in the board’s JSON file.

When switching to stlink as upload_protocol I see the following openocd command (in verbose upload):

AVAILABLE: mbed, stlink
CURRENT: upload_protocol = stlink
openocd -d2 -s C:\Users\Jeroen\.platformio\packages\tool-openocd/scripts -f board/JENG_STM32L082KZ.cfg -c "program {.pio\build\STM32L082_bank2\firmware.bin} 0x08018000 verify reset; shutdown;"

So that looks good. I used mbed as STLink often has ‘Error: target voltage may be too low for reliable debugging’ / as I see now again. Will have to fix it.

Thanks a lot so far / be back l8r

Maybe the VTARGET pin of the STLink isn’t properly connected to the system’s running voltage, like 3.3V. Or it has problems with lower voltages like 1.8V.

Vtarget I measure 2.5(V) (but cubeprogrammer says 0.01(V).
Maybe increase it to 3.3(V) tomorrow. Enough for today.

1 Like

When using STLINKv2 I have Vtarget now at good level and able to connect in CubeProgrammer.
Platformio upload struggling to get it working

For the variabels from the linker file - see below - does I need to add extra build_flags in the platformio.ini ?

  • LD_MAX_DATA_SIZE
  • LD_FLASH_OFFSET
  • LD_MAX_SIZE

I could imagine something like this to add?
build_flags = -Wl,--defsym=LD_MAX_DATA_SIZE=0x5000 -Wl,--defsym=LD_MAX_SIZE=0x30000 -Wl,--defsym=LD_FLASH_OFFSET=0x18000

Meaning it fails to upload (with what error message?) or fails to run the code in bank2?

Apologise :roll_eyes:. my Dual Bank experiment was burried due to other projects. Will pick it up in the coming weeks again.

The status quo was that upload is not working when using platformio (CubeProgrammer is able to connect).

AVAILABLE: mbed, stlink
CURRENT: upload_protocol = stlink
openocd -d2 -s C:\Users\jeroen\.platformio\packages\tool-openocd/scripts -f board/JENG_STM32L082KZ.cfg -c "program {.pio\build\STM32L082_bank1\firmware.elf}  verify reset; shutdown;"
xPack OpenOCD x86_64 Open On-Chip Debugger 0.11.0+dev (2021-10-16-21:19)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
debug_level: 2

Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Info : clock speed 300 kHz
Info : STLINK V2J34S7 (API v2) VID:PID 0483:3748
Info : Target voltage: 1.767589
Error: init mode failed (unable to connect to the target)
in procedure 'program'
** OpenOCD init failed **
shutdown command invoked

*** [upload] Error 1

Can you open an issue about this in Issues · platformio/platform-ststm32 · GitHub? If it works with other tools, it should work with ours.

Just issued it: ST-LINKv2 / STM32L0 / Unable to connect to the target · Issue #641 · platformio/platform-ststm32 · GitHub

1 Like

@maxgerhardt - to be it seems like a reset / connect issue.

When using cubeprogrammer and do following

  • mass erase the stm32,
  • close cubeprogrammer and
  • do an upload via platformio it is progressing further and
  • “halts” when doing ‘resetting target’ (see below)

Do you know where the reset is defined and executed?

AVAILABLE: mbed, stlink
CURRENT: upload_protocol = stlink
openocd -d2 -s C:\Users\jeroen\.platformio\packages\tool-openocd/scripts -f board/JENG_STM32L082KZ.cfg -c "program {.pio\build\STM32L082_bank1\firmware.elf}  verify reset; shutdown;"
xPack OpenOCD x86_64 Open On-Chip Debugger 0.11.0+dev (2021-10-16-21:19)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
debug_level: 2

Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
Info : clock speed 300 kHz
Info : STLINK V2J34S7 (API v2) VID:PID 0483:3748
Info : Target voltage: 1.766008
Info : STM32L082KZTx.cpu: Cortex-M0+ r0p1 processor detected
Info : STM32L082KZTx.cpu: target has 4 breakpoints, 2 watchpoints
Info : starting gdb server for STM32L082KZTx.cpu on 3333
Info : Listening on port 3333 for gdb connections
Info : Unable to match requested speed 300 kHz, using 240 kHz
Info : Unable to match requested speed 300 kHz, using 240 kHz
target halted due to debug-request, current mode: Thread 
xPSR: 0xf0000000 pc: 00000000 msp: 00000000
STM32L0: Enabling HSI16
Info : Unable to match requested speed 2500 kHz, using 1800 kHz
Info : Unable to match requested speed 2500 kHz, using 1800 kHz
** Programming Started **
Info : Device: STM32L0xx (Cat.5)
Info : STM32L flash has dual banks. Bank (0) size is 96kb, base address is 0x8000000
** Programming Finished **
** Verify Started **
** Verified OK **
** Resetting Target **
Info : Unable to match requested speed 300 kHz, using 240 kHz
Info : Unable to match requested speed 300 kHz, using 240 kHz
in procedure 'program'
*** [upload] Error 1

You have defined your own OpenOCD config, so that must be in there, like in

Thanks.
Did try these - unfortunately it is not a solution

Did you try all reset_config options from STM32 + VS Code + mbed upload issue: Error: libusb_open() failed with LIBUSB_ERROR_ACCESS Error: open failed - #12 by maxgerhardt?

Interesting! Seems that when using one of the below configs the connect to the STM32 works

  • reset_config srst_only srst_nogate connect_assert_srst
  • reset_config trst_and_srst srst_nogate connect_assert_srst

However still halts when resetting the target again - see below:

AVAILABLE: mbed, stlink
CURRENT: upload_protocol = stlink
openocd -d2 -s C:\Users\jeroen\.platformio\packages\tool-openocd/scripts -f board/JENG_STM32L082KZ.cfg -c "program {.pio\build\STM32L082_bank1\firmware.elf}  verify reset; shutdown;"
xPack OpenOCD x86_64 Open On-Chip Debugger 0.11.0+dev (2021-10-16-21:19)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
debug_level: 2

Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
srst_only separate srst_nogate srst_open_drain connect_assert_srst

Info : clock speed 300 kHz
Info : STLINK V2J34S7 (API v2) VID:PID 0483:3748
Info : Target voltage: 1.764427
Info : STM32L082KZTx.cpu: Cortex-M0+ r0p1 processor detected
Info : STM32L082KZTx.cpu: target has 4 breakpoints, 2 watchpoints
Info : starting gdb server for STM32L082KZTx.cpu on 3333
Info : Listening on port 3333 for gdb connections
Info : Unable to match requested speed 300 kHz, using 240 kHz
Info : Unable to match requested speed 300 kHz, using 240 kHz
target halted due to debug-request, current mode: Thread 
xPSR: 0xf1000000 pc: 0x08002da8 msp: 0x20005000
STM32L0: Enabling HSI16
Info : Unable to match requested speed 2500 kHz, using 1800 kHz
Info : Unable to match requested speed 2500 kHz, using 1800 kHz
** Programming Started **
Info : Device: STM32L0xx (Cat.5)
Info : STM32L flash has dual banks. Bank (0) size is 96kb, base address is 0x8000000
** Programming Finished **
** Verify Started **
** Verified OK **
** Resetting Target **
Info : Unable to match requested speed 300 kHz, using 240 kHz
Info : Unable to match requested speed 300 kHz, using 240 kHz
in procedure 'program'
*** [upload] Error 1

Need to check where that last part (in procedure ‘program’) is executed and what is done.

Maybe the OpenOCD can help you with that: Forum

Yes will post hte openCD question there and see how we solve the “reset” after programming is done.

Too bad that the OCD forum is closed / locked / archived :frowning:

Although openOCD issue is still open I ran into another challenge

  • Able to build files for BANK1 and BANK2
  • ELF files look good (see BANK2 at bottom)
  • Uploading via openOCD
    ** BANK1: It actually uploads (verified in CubeProgrammer)|
    ** BANK2: It actually uploads after the following update in board config file:
    ** source [find target/stm32l0_dual_bank.cfg] (instead of source [find target/stm32l0.cfg])
    ** Programming Started **
    Info : Device: STM32L0xx (Cat.5)
    Info : STM32L flash has dual banks. Bank (0) size is 96kb, base address is 0x8000000
    Info : Device: STM32L0xx (Cat.5)
    Info : STM32L flash has dual banks. Bank (1) size is 96kb, base address is 0x8018000
    ** Programming Finished **
    ** Verify Started **
    ** Verified OK **
    ** Resetting Target **
    Info : Unable to match requested speed 300 kHz, using 240 kHz
    Info : Unable to match requested speed 300 kHz, using 240 kHz
    shutdown command invoked
    ======================================================================== [SUCCESS] Took 12.76 seconds ========================================================================
    
    Environment      Status    Duration
    ---------------  --------  ------------
    STM32L082_bank1  IGNORED
    STM32L082_bank2  SUCCESS   00:00:12.764

However upload does not result in running code in BANK2 (BFB2=1). Therefore I decided to build in platformio and upload bank1 (0x0800 000) and bank2 (0x0801 8000) BIN file via CubeProgrammer. Following:

  • Uploading via CubeProgrammer (BFB2 = 0)
    • BANK1 → 0x0800 0000
    • BANK2 → 0x0801 8000
  • Running the code via BANK1 (BFB2=0) works (get serial output)
  • Now try to run code from BANK2 (BFB2=1 via CubeProgrammer) and reset the STM32

Upload via platformio and CubeProgrammer has the same result. I would expect bank2 code to run however I see no activity at all. Why? I am puzzled

BANK2 elf

PS C:\Users\jeroen\Documents\PlatformIO\Projects\Dual Bank Boot> arm-none-eabi-objdump -D .pio\build\STM32L082_bank2\firmware.elf | more 

.pio\build\STM32L082_bank2\firmware.elf:     file format elf32-littlearm


Disassembly of section .isr_vector:

08018000 <g_pfnVectors>:
 8018000:       20005000        andcs   r5, r0, r0
 8018004:       0801adb5        stmdaeq r1, {r0, r2, r4, r5, r7, r8, sl, fp, sp, pc}
 8018008:       0801ae05        stmdaeq r1, {r0, r2, r9, sl, fp, sp, pc}
 801800c:       0801ae05        stmdaeq r1, {r0, r2, r9, sl, fp, sp, pc}
        ...
 801802c:       0801ae05        stmdaeq r1, {r0, r2, r9, sl, fp, sp, pc}

Quick update on the above. Problem was solved - was due to coding flaw in the SystemInit(). That is solved in stm32duino v2.3.0.

See also How to boot from bank 1 or 2 / Dual Bank Flash / STM32L082 · Discussion #1866 · stm32duino/Arduino_Core_STM32 · GitHub