Hm, getting closer…
I’ve used a Linux VM to install rustup, installed rust-nightly and then executed the build instructions and out popped the SVD files.
Added them all in the platform/atmelavr/misc/svd folder and referenced them in the board file, and during debugging it attemps to load them but fails.
Not 100% sure if the parser is broken or the generated SVD file. But I can at least file a PR now that adds the SVD files as a first step.
Edit: Huh interesting, when I feed the SVD file into CLion it can enumerate it just fine…
will have another play with it…
Edit: So close yet so far. CLion can parse the SVD file, but it seems it can’t get the values for the I/O registers through avr-gdb. Some values are working though.
As said I’ll create a PR and issue.
Done in Add SVD files for ATMega chips by maxgerhardt · Pull Request #238 · platformio/platform-atmelavr · GitHub and SVD Parser fails for ATMega files with "TypeError: Cannot read property '0' of undefined" · Issue #2368 · platformio/platformio-vscode-ide · GitHub